Data processing systems which operate in a stand alone manner or as one of a plurality of nodes in a computer network are known. Illustrative types of such systems are computers such as workstations, mainframes, and minicomputers, etc. The interconnection of the components,.or cards, within such a system is typically achieved via a linear data bus architecture.
Fault tolerant systems are advantageous since such systems may be able to continue to operate even in the event of a fault and/or following removal of a system component. Preferably, the interconnection topology provides a level of fault tolerance which permits the data processing system to continue operation in the event of one or more faults or in the event of :removal of one or more components.
Various schemes are utilized to interconnect the components of a data processing system to achieve some level of fault tolerance. One such scheme utilizes parallel redundant linear data buses to interconnect the system components, either with each component connected to each of the parallel buses or with selected components, such as disk controllers, connected to both buses and other components, such as processors, coupled to only one of the buses. The feasibility of this scheme may be limited due to the area necessary for the additional pins and drivers to connect to the redundant bus. Moreover, since some of the system components are coupled to both of the buses, a fault associated with such a component can interrupt service on both of the buses, thereby halting operation of the entire system.
Another fault tolerant interconnection arrangement, providing at least partial fault tolerance for use with ring interconnected networks, utilizes "bus wrapping" hardware for bypassing a disabled system component. More particularly, each of the components includes hardware for permitting data to be transmitted therethrough in the event of a failure of circuitry associated with the component, thereby enabling the other components on the ring to maintain communication. Use of such "bus wrapping" hardware disadvantageously increases the cost of the system components.